We owe our connected present in large part to a single device smaller than a grain of sand: the charge trap flash cell. Innovations in flash architecture have enabled seismic shifts in smart technology costs that changed everything for consumers. The NAND cell is now a staple of daily routines like checking steps on a smartwatch or kicking on the AC before arriving home.
It is the building block of the Internet of Things, the new technological fabric of everyday life. This is why Western Digital still obsesses with getting it right.
The only way to go is up
“If I cannot scale X or Y,” said Luca Fasoli, SVP of memory product solutions, silicon technology and manufacturing at Western Digital, “the only way to go is up.”
Fasoli brought his bright Italian tenor to the complex subject of 3D NAND, starting with the basics. The core of a charge trap device is an insulator layer that can trap electrons and charge negatively, he explained. In the technology’s early days, each cell worked like an infinitesimal physical manifestation of binary code, storing only two levels. But flash has moved beyond binary (known as X1), on to double (X2), triple (X3), and quadruple (X4) level cell storage. Each bit increase has required adding twice as many cell states, a movement indebted to 3D NAND.
3D NAND is partially indebted to Western Digital.
In 2013, Western Digital and Kioxia engineers quite literally turned the transistor on its head, rotating the flat rows of charge traps 90 degrees so they stacked into columns. The cells once marked circular points where x and y axes met on two-dimensional grids. But when stacked on top of one another, these points became cylinders that could be manufactured by the dozen in one deep, precise drill.
This was exactly what made scaling along the Z-axis so exciting: how it enabled this new manufacturing process. Even more so, how this new manufacturing process was infinitely more cost-effective than the standard procedure for producing two-dimensional cells.
Scaling flash into the third dimension brought a windfall in the mass production of charge trap devices, sweeping smart products into the price range of more consumers than ever before — but with new success came new challenges.
A very consistent way
“Precision is usually a tradeoff of time,” Fasoli said. The cylinders that hold the semiconductive fluid, constituting the Z-axis of each charge trap, are about 150 nanometers wide. That’s closer to the size of a single strand of DNA than a single strand of human hair. If the drill’s angle is off by even a fraction of a degree, the mistake ripples exponentially, degrading performance throughout the stack.
This delicate “drilling” process is called high-aspect-ratio etching. It’s a technology for producing microscopic holes much deeper than their width. For reference, the aspect ratio of the Empire State Building is roughly 1:2.95, or, it’s roughly three times taller than it is wide. The aspect ratio of a 3D NAND structure is roughly 1:60 and is likely to increase.
Traditional tools stop working once the aspect ratio gets too large, like the amorphous carbon typically employed to protect material during plasma etching. Flash manufacturers are pushing the limits of the etching process by continuing to scale up. For flash to keep progressing at the clip of Moore’s Law, something’s got to give.
Western Digital approaches the challenge with a simple solution: boring through wafer stacks one half at a time to drill at a lower aspect ratio and reduce the margin of error. “The key to being unique,” Fasoli said of Western Digital’s flash innovation, “is really being paranoid about building something that can be done in a very consistent way.”
The right answer
Fasoli insisted there was no single man behind the curtain at Western Digital. “We have this idea that innovation comes from this spark of genius,” he said. “In reality, I want to point out that — the things that we do are so complex, they require teams of hundreds to thousands of people all working together.”
Fasoli explained the process of invention as an exercise in tireless collaboration. “By continuously refining our process, we can actually get to the right answer,” he said.
Now, Western Digital engineers are working on the next right answer: the next innovation that will scale flash along its breakneck pace. Fasoli is interested in moving compute closer to storage to reduce data transfer bottlenecks.
The cloud can store nearly endless amounts of data and our computer processors are better than ever at processing this data. It’s the narrow highway between the two that causes lag time. But engineers are reconsidering the data highway altogether. “Rather than moving the mountain,” Fasoli drew an analogy to moving the CPU, “I go to where the mountain is.”
What world might this open for consumers? Fasoli cannot say what the fifth industrial revolution will look like — but the next generation of IoT devices will consume much less power and retrieve data instantaneously. Future generations might laugh at concepts such as a loading screen.
But all that is far away. For now, Western Digital engineers work together to refine the process, one cell at a time.
