Open Source
Opening Doors to Open-Source Hardware, Software and Standards
From zoned storage to root-of-trust chips to shared memory pools, we're leading open-source innovation to drive new system architectures. Learn more here.
February 24, 2020 • 5 min read People
Driving to Data-Centric Architectures and 1B RISC-V Cores
Our open sourced RISC-V-based SweRV Core family is growing by two as we announce the world’s first commercial dual-threaded embedded core, SweRV Core EH2, and the company’s smallest SweRV Core to date, EL2.
December 10, 2019 • 4 min read Data
Five Reasons the 2019 RISC-V Summit is a Can’t-Miss Event
The 2019 RISC-V Summit, December 10-12 in San Jose, is a can’t-miss event for everyone interested in learning how the free and open ISA is transforming the computing landscape and beyond.
November 18, 2019 • 2 min read Data
Making Data Infrastructure Safer and More Transparent with OpenTitan
We have entered an exciting new partnership with lowRISC and Google in support of OpenTitan, the first open-source project building transparent, high-quality reference design and integration guidelines for silicon root of trust (RoT) chips that can be used in data storage, compute, and other hardware platforms.
November 5, 2019 • 5 min read People
4 Reasons You Should Be Excited at OCP Amsterdam
The open-source community is pushing forward new technology to make hardware more flexible, scalable, and efficient. As a leader in energy-conscious hardware design, we’re excited to participate in the Open Compute Project (OCP) Regional Summit, taking place in Amsterdam. This two-day event – tailored for hardware designers, data center architects, infrastructure engineers, and other technologists […]
September 25, 2019 • 3 min read Data
RISC-V SweRV CoreTM Available to Open Source Community
We delivered on our promise to open source the SweRV Core, which supports our internal RISC-V development efforts & those of the growing RISC-V ecosystem.
April 11, 2019 • 3 min read Data
Unleashing Innovation from Core to the Edge
At the first RISC-V Summit in Santa Clara, California, Western Digital EVP & CTO Martin Fink delivered a keynote entitled, "Unleashing Innovation from Core to the Edge," punctuated by announcements of three new Western Digital developed open-source innovations.
December 19, 2018 • 2 min read People
Five Reasons the RISC-V Summit is a Can’t-Miss Event
The RISC-V Summit in Santa Clara, California, is a can’t-miss event for everyone interested in learning how the free and open ISA is transforming the computing landscape and beyond. Here are the Top 5 reasons not to miss the summit!
November 27, 2018 • 2 min read Data
Accelerating the RISC-V Ecosystem
Learn about accelerating the RISC-V ecosystem: 1. The current state of the ecosystem; 2. What it needs and the work that must be done. For those who want to be part of defining, inventing and creating where the world's going to be and how the next generation of applications are going to be optimized, this is the time to be involved.
October 1, 2018 • 2 min read People
RISC-V and Future Data Workloads
Learn how the role of data is changing in our lives, and find out why this makes alternative approaches to processing data important, by watching this short video discussion between Steffen Hellmold, VP of Corporate Strategy, and Martin Fink, CTO, as their conversation about RISC-V continues.
September 6, 2018 • 2 min read People